Image sensor arrays typically comprise a linear array of photosensors which raster scan an image bearing document and convert the microscopic image areas viewed by each photosensor to image signal charges. Following an integration period, the image signal charges are amplified and transferred as an analog video signal to a common output line or bus through successively actuated multiplexing transistors. A basic circuitry for such an image sensor array is given in U.S. Pat. No. 5,081,536, referenced above.
For high-performance image sensor arrays, a preferred design includes an array of photosensors of a width comparable to the width of a page being scanned, to permit one-to-one imaging generally without the use of reductive optics. In order to provide such a “full-width” array, however, relatively large silicon structures must be used to define the large number of photosensors. A preferred technique to create such a large array is to make the array out of several butted silicon chips. In one proposed design, an array is intended to be made of 20 silicon chips, butted end-to-end, each chip having 248 active photosensors spaced at 400 photosensors per inch.
Although most scanning systems currently in use are ultimately digital systems, the “raw signal” coming out of the photosensors during the scanning process is an analog video signal, with the voltage magnitude corresponding to the intensity of light impinging on the photosensor at a given time. Thus, when signals are read out from the photosensors on a chip to be converted to digital data, different video levels are output as a series of analog voltage levels; the voltage levels each correspond to the brightness of the reflected area being scanned by a particular photosensor at a particular moment.
The speed of output of each chip will depend on the voltage response of the output channel. A chip outputs a sequence of voltage levels, each voltage level corresponding to a pixel in the original image. With each pixel in the original image, the voltage level must move from a signal representative of light of the previous pixel to one representative of light in the present pixel. Because of the analog nature of a video-outputting chip, the sequence of voltage outputs from one voltage level (corresponding to one pixel) to the next is a set of asymptotic curves. When the outputs of a plurality of photosensors are read out serially, certain time must be allowed between each photosensor reading to allow the reading to settle to the value of a signal corresponding to the light impinging on the photosensor. In a typical practical system for reading out the video signals, this readout time for real-time scanning is approximately 50 nanoseconds per photosensor. With each pixel signal, what is of most interest is where the analog voltage curve “ends up”—that is, the final value of the voltage signal is what is representative of the true light intensity on the photosensor. When a set of analog video signals are output over time, the “settling time” is the portion of the output for each pixel in which the voltage level starts moving from the voltage level from the previous pixel to the voltage level of the present pixel. The settling time associated with a chip directly affects the readout speed of the chip.
A desirable feature of a photosensitive apparatus having an array of photosensors is the capability for multiple selectable imaging resolutions. For example, if a chip includes a set of photosensors spaced 600 to the inch, it may be desirable to operate the chip so that each adjacent pair of photosensors in effect operates as one photosensor, so that the effective spatial resolution of the apparatus is 300 spots per inch. A lower spatial resolution results in smaller image file sizes (which may be desirable in some scanning contexts, such as archiving, or pattern or character recognition) and can facilitate a higher readout rate. The present description relates to a photosensitive imaging apparatus which is operable at multiple resolutions.